Wire and gate delays are accounted to have equal, or nearly equal, effect on circuit behavior in modern design techniques. This paper introduces a new approach to verify circuits ...
Alex Kondratyev, Oriol Roig, Lawrence Neukom, Karl...
Abstract. In this paper, we propose a new method for revising terminologies in description logic-based ontologies. Our revision method is a reformulation of the kernel revision ope...
Guilin Qi, Peter Haase, Zhisheng Huang, Jeff Z. Pa...
Abstract. Church's Problem, stated fifty years ago, asks for a finitestate machine that realizes the transformation of an infinite sequence into an infinite sequence such tha...
We study the complexity of satisfiability and model-checking of the linear-time temporal logic with past (pltl). More precisely, we consider several fragments of pltl, depending o...
We give a sound and complete propositional S5 tableau system of a particularly simple sort, having an easy completeness proof. It sheds light on why the satisfiability problem for...