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» Logic programming with satisfiability
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CADE
2001
Springer
15 years 12 months ago
More On Implicit Syntax
Proof assistants based on type theories, such as Coq and Lego, allow users to omit subterms on input that can be inferred automatically. While those mechanisms are well known, ad-h...
Marko Luther
SIGMOD
2009
ACM
202views Database» more  SIGMOD 2009»
15 years 12 months ago
ZStream: a cost-based query processor for adaptively detecting composite events
Composite (or Complex) event processing (CEP) systems search sequences of incoming events for occurrences of userspecified event patterns. Recently, they have gained more attentio...
Yuan Mei, Samuel Madden
ICCD
2008
IEEE
192views Hardware» more  ICCD 2008»
15 years 8 months ago
Energy-aware opcode design
— Embedded processors are required to achieve high performance while running on batteries. Thus, they must exploit all the possible means available to reduce energy consumption w...
Balaji V. Iyer, Jason A. Poovey, Thomas M. Conte
ICCAD
2006
IEEE
127views Hardware» more  ICCAD 2006»
15 years 8 months ago
Joint design-time and post-silicon minimization of parametric yield loss using adjustable robust optimization
Parametric yield loss due to variability can be effectively reduced by both design-time optimization strategies and by adjusting circuit parameters to the realizations of variable...
Murari Mani, Ashish Kumar Singh, Michael Orshansky
DAC
2009
ACM
15 years 6 months ago
Clock skew optimization via wiresizing for timing sign-off covering all process corners
Manufacturing process variability impacts the performance of synchronous logic circuits by means of its effect on both clock network and functional block delays. Typically, varia...
Sari Onaissi, Khaled R. Heloue, Farid N. Najm