Sciweavers

13 search results - page 3 / 3
» Logic-Based Distributed Routing for NoCs
Sort
View
DATE
2004
IEEE
154views Hardware» more  DATE 2004»
15 years 1 months ago
MultiNoC: A Multiprocessing System Enabled by a Network on Chip
The MultiNoC system implements a programmable onchip multiprocessing platform built on top of an efficient, low area overhead intra-chip interconnection scheme. The employed inter...
Aline Mello, Leandro Möller, Ney Calazans, Fe...
DATE
2009
IEEE
113views Hardware» more  DATE 2009»
15 years 4 months ago
Priority based forced requeue to reduce worst-case latencies for bursty traffic
- In this paper we introduce Priority Based Forced Requeue to decrease worst-case latencies in NoCs offering best effort services. Forced Requeue is to prematurely lift out low pri...
Mikael Millberg, Axel Jantsch
HPCA
2009
IEEE
15 years 10 months ago
Prediction router: Yet another low latency on-chip router architecture
Network-on-Chips (NoCs) are quite latency sensitive, since their communication latency strongly affects the application performance on recent many-core architectures. To reduce th...
Hiroki Matsutani, Michihiro Koibuchi, Hideharu Ama...