In this paper we present fault tolerant CMOS logic using redundancy and ternary signals. The ternary gates are implemented using recharge logic which can be exploited in binary an...
Abstract. We introduce an extension of Hoare logic for call-by-value higherorder functions with ML-like local reference generation. Local references may be generated dynamically an...
This paper reports our ongoing research effort to develop a system which translates legal texts into logical forms in which we can check for inconsistency. Our logical formalizati...
We analyze the neutron induced soft error rate (SER) by modeling induced error pulse using two parameters, occurrence frequency and probability density function for the pulse widt...
A number of logic programming languages based on Linear Logic [3] have been proposed. However, the implementation techniques proposed for these languages have relied heavily on th...
Joshua S. Hodas, K. M. Watkins, Naoyuki Tamura, Ky...