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ICN
2009
Springer
15 years 6 months ago
New Algorithm for the Design of Topology Aware Hypercube in Multi-hop Ad Hoc Networks
Securing group communications in resource constrained, infrastructure-less environments such as Mobile Ad Hoc Networks (MANETs) has become one of the most challenging research dire...
Maria Striki, Kyriakos Manousakis, John S. Baras
EVOW
2001
Springer
15 years 6 months ago
ARPIA: A High-Level Evolutionary Test Signal Generator
The integrated circuits design flow is rapidly moving towards higher description levels. However, test-related activities are lacking behind this trend, mainly since effective faul...
Fulvio Corno, Gianluca Cumani, Matteo Sonza Reorda...
101
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FPGA
2001
ACM
123views FPGA» more  FPGA 2001»
15 years 6 months ago
Mixing buffers and pass transistors in FPGA routing architectures
The routing architecture of an FPGA consists of the length of the wires, the type of switch used to connect wires (buffered, unbuffered, fast or slow) and the topology of the inte...
Mike Sheng, Jonathan Rose
ICCS
2001
Springer
15 years 6 months ago
Inclusion-Based Approximate Reasoning
Nowadays, people start to accept fuzzy rule–based systems as flexible and convenient tools to solve a myriad of ill–defined but otherwise (for humans) straightforward tasks s...
Chris Cornelis, Etienne E. Kerre
ITC
1998
IEEE
120views Hardware» more  ITC 1998»
15 years 6 months ago
Test generation in VLSI circuits for crosstalk noise
This paper addresses the problem of efficiently and accurately generating two-vector tests for crosstalk induced effects, such as pulses, signal speedup and slowdown, in digital c...
Weiyu Chen, Sandeep K. Gupta, Melvin A. Breuer