1010 search results - page 193 / 202 » Logics for Contravariant Simulations |
100
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MICRO
2006
IEEE
15 years 8 months ago
2006
IEEE
To protect processor logic from soft errors, multicore redundant architectures execute two copies of a program on separate cores of a chip multiprocessor (CMP). Maintaining identi...
126
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RTAS
2006
IEEE
15 years 8 months ago
2006
IEEE
A notable features of many proposed Wireless Sensor Networks (WSNs) deployments is their scale: hundreds to thousands of nodes linked together. In such systems, modeling the state...
130
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IWCMC
2006
ACM
15 years 7 months ago
2006
ACM
Securing multicast communications in ad hoc networks has become one of the most challenging research directions in the areas of wireless networking and security. This is especiall...
132
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IEEEPACT
2005
IEEE
15 years 7 months ago
2005
IEEE
VLIW architectures are popular in embedded systems because they offer high-performance processing at low cost and energy. The major problem with traditional VLIW designs is that t...
139
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KBSE
2005
IEEE
15 years 7 months ago
2005
IEEE
In test generation based on model-checking, white-box test criteria are represented as trap conditions written in a temporal logic. A model checker is used to refute trap conditio...