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PATMOS
2005
Springer
15 years 6 months ago
Design of Variable Input Delay Gates for Low Dynamic Power Circuits
The time taken for a CMOS logic gate output to change after one or more inputs have changed is called the output delay of the gate. A conventional multi-input CMOS gate is designed...
Tezaswi Raja, Vishwani D. Agrawal, Michael L. Bush...
FPGA
2003
ACM
156views FPGA» more  FPGA 2003»
15 years 6 months ago
Architectures and algorithms for synthesizable embedded programmable logic cores
As integrated circuits become more and more complex, the ability to make post-fabrication changes will become more and more attractive. This ability can be realized using programm...
Noha Kafafi, Kimberly Bozman, Steven J. E. Wilton
SRDS
2007
IEEE
15 years 7 months ago
Customizable Fault Tolerance for Wide-Area Replication
Constructing logical machines out of collections of physical machines is a well-known technique for improving the robustness and fault tolerance of distributed systems. We present...
Yair Amir, Brian A. Coan, Jonathan Kirsch, John La...
ICTAI
2007
IEEE
15 years 7 months ago
Establishing Logical Rules from Empirical Data
We review a method of generating logical rules, or axioms, from empirical data. This method, using closed set properties of formal concept analysis, has been previously described ...
John L. Pfaltz
DBPL
1993
Springer
89views Database» more  DBPL 1993»
15 years 5 months ago
Database Programming in Transaction Logic
This paper presents database applications of the recently proposed Transaction Logic—an extension of classical predicate logic that accounts in a clean and declarative fashion f...
Anthony J. Bonner, Michael Kifer, Mariano P. Conse...