Sciweavers

2501 search results - page 217 / 501
» Logics with Rank Operators
Sort
View
152
Voted
ICFP
2008
ACM
16 years 4 months ago
AURA: a programming language for authorization and audit
This paper presents AURA, a programming language for access control that treats ordinary programming constructs (e.g., integers and recursive functions) and authorization logic co...
Limin Jia, Jeffrey A. Vaughan, Karl Mazurak, Jianz...
142
Voted
FPGA
2004
ACM
128views FPGA» more  FPGA 2004»
15 years 8 months ago
Incremental physical resynthesis for timing optimization
This paper presents a new approach to timing optimization for FPGA designs, namely incremental physical resynthesis, to answer the challenge of effectively integrating logic and p...
Peter Suaris, Lung-Tien Liu, Yuzheng Ding, Nan-Chi...
DIMACS
1996
15 years 6 months ago
Model Checking and the Mu-calculus
There is a growing recognition of the need to apply formal mathematical methods in the design of \high con dence" computing systems. Such systems operate in safety critical co...
E. Allen Emerson
CSREAESA
2009
15 years 6 months ago
Built-In Self-Test of Embedded SEU Detection Cores in Virtex-4 and Virtex-5 FPGAs
A Built-In Self-Test (BIST) approach is presented for the Internal Configuration Access Port (ICAP) and Frame Error Correcting Code (ECC) logic cores embedded in Xilinx Virtex-4 an...
Bradley F. Dutton, Charles E. Stroud
CORR
2007
Springer
147views Education» more  CORR 2007»
15 years 5 months ago
Model Checking Synchronized Products of Infinite Transition Systems
Formal verification using the model checking paradigm has to deal with two aspects: The system models are structured, often as products of components, and the specification logic...
Stefan Wöhrle, Wolfgang Thomas