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MKM
2007
Springer
15 years 12 months ago
Context Aware Calculation and Deduction
We address some aspects of a proposed system architecture for mathematical assistants, integrating calculations and deductions by common infrastructure within the Isabelle theorem ...
Amine Chaieb, Makarius Wenzel
DATE
2006
IEEE
133views Hardware» more  DATE 2006»
15 years 11 months ago
Analysis and synthesis of quantum circuits by using quantum decision diagrams
Quantum information processing technology is in its pioneering stage and no proficient method for synthesizing quantum circuits has been introduced so far. This paper introduces a...
Afshin Abdollahi, Massoud Pedram
ISCAS
2006
IEEE
103views Hardware» more  ISCAS 2006»
15 years 11 months ago
A high-speed low-energy dynamic PLA using an input-isolation scheme
— Recently, there has been renewed interest in structured logic arrays due to a number of inherent advantages. However, before they will be more widely adopted, structured logic ...
Reza Molavi, Shahriar Mirabbasi, Resve A. Saleh
IWANN
2005
Springer
15 years 11 months ago
Ultra Low-Power Neural Inspired Addition: When Serial Might Outperform Parallel Architectures
Abstract. In this paper we analyse a serial (ripple carry) and a parallel (Kogge-Stone) adder when operating in subthreshold at 100nm and 70nm. These are targeted for ultra low pow...
Valeriu Beiu, Asbjørn Djupdal, Snorre Aunet
IOLTS
2003
IEEE
126views Hardware» more  IOLTS 2003»
15 years 11 months ago
Synthesis of Low-Cost Parity-Based Partially Self-Checking Circuits
A methodology for the synthesis of partially selfchecking multilevel logic circuits with low-cost paritybased concurrent error detection (CED) is described. A subset of the inputs...
Kartik Mohanram, Egor S. Sogomonyan, Michael G&oum...