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ISMVL
2010
IEEE
191views Hardware» more  ISMVL 2010»
15 years 11 months ago
Toffoli Gate Implementation Using the Billiard Ball Model
— In this paper we review the Billiard Ball Model (BBM) introduced by Toffoli and Fredkin. The analysis of a previous approach to design reversible networks based on BBM it shown...
Hadi Hosseini, Gerhard W. Dueck
ASAP
2002
IEEE
103views Hardware» more  ASAP 2002»
15 years 11 months ago
PAPA - Packed Arithmetic on a Prefix Adder for Multimedia Applications
This paper introduces PAPA: Packed Arithmetic on a Prefix Adder, a new approach to parallel prefix adder design that supports a wide variety of packed arithmetic computations, inc...
Neil Burgess
ITC
2002
IEEE
81views Hardware» more  ITC 2002»
15 years 10 months ago
Design Rewiring Using ATPG
—Logic optimization is the step of the very large scale integration (VLSI) design cycle where the designer performs modifications on a design to satisfy different constraints suc...
Andreas G. Veneris, Magdy S. Abadir, Mandana Amiri
141
Voted
VL
2002
IEEE
105views Visual Languages» more  VL 2002»
15 years 10 months ago
A Visual Framework for Modelling with Heterogeneous Notations
There is a range of modelling notations, both textual and diagrammatic, whose semantics are based on first-order predicate logic. This paper presents a visual framework for organ...
Jean Flower, John Howse, John Taylor, Stuart Kent
AIMSA
2000
Springer
15 years 10 months ago
Least Generalization under Relative Implication
Inductive Logic Programming (ILP) deals with inducing clausal theories from examples basically through generalization or specialization. The specialization and generalization oper...
Svetla Boytcheva