In this paper we examine a latency insensitive network composed of very fast and simple circuits that connects SoC cores that are also latency insensitive, de-synchronized, or asy...
Daniel Gebhardt, JunBok You, W. Scott Lee, Kenneth...
This paper uses a long term ethnographic study of the design and implementation of an electronic patient records (EPR) system in a UK hospital Trust to consider issues arising in ...
David Martin, Mark Rouncefield, Jacki O'Neill, Mar...
As on-chip networks become prevalent in multiprocessor systemson-a-chip and multi-core processors, they will be an integral part of the design flow of such systems. With power in...
In a pervasive computing environment, the devices are embedded in the physical world, providing services and interconnected by a communication network. Composition of these servic...
Joanna Izabela Siebert, Jiannong Cao, Long Cheng, ...
We present a analytical framework to identify the tradeoffs and performance impacts associated with different SoC platform configurations in the specific context of implementing m...
Alexander Maxiaguine, Yongxin Zhu, Samarjit Chakra...