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CORR
2010
Springer
121views Education» more  CORR 2010»
15 years 2 months ago
Asynchronous Bounded Expected Delay Networks
We propose a natural generalisation of asynchronous bounded delay (ABD) network models. The commonly used ABD models assume a known bound on message delay. This assumption is ofte...
Rena Bakhshi, Jörg Endrullis, Wan Fokkink, Ju...
DAC
2003
ACM
16 years 2 months ago
On-chip logic minimization
While Boolean logic minimization is typically used in logic synthesis, logic minimization can be useful in numerous other applications. However, many of those applications, such a...
Roman L. Lysecky, Frank Vahid
ISLPED
1995
ACM
131views Hardware» more  ISLPED 1995»
15 years 5 months ago
Guarded evaluation: pushing power management to logic synthesis/design
The need to reduce the power consumption of the next generation of digital systems is clearly recognized. At the system level, power management is a very powerful technique and de...
Vivek Tiwari, Sharad Malik, Pranav Ashar
SIGMOD
2009
ACM
137views Database» more  SIGMOD 2009»
16 years 2 months ago
Advances in flash memory SSD technology for enterprise database applications
The past few decades have witnessed a chronic and widening imbalance among processor bandwidth, disk capacity, and access speed of disk. According to Amdhal's law, the perfor...
Sang-Won Lee, Bongki Moon, Chanik Park
ASPLOS
2010
ACM
15 years 8 months ago
COMPASS: a programmable data prefetcher using idle GPU shaders
A traditional fixed-function graphics accelerator has evolved into a programmable general-purpose graphics processing unit over the last few years. These powerful computing cores...
Dong Hyuk Woo, Hsien-Hsin S. Lee