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IPPS
2000
IEEE
15 years 6 months ago
Design and Evaluation of I/O Strategies for Parallel Pipelined STAP Applications
This paper presents experimental results for a parallel pipeline STAP system with I/O task implementation using the parallel file systems on the Intel Paragon and the IBM SP. In ...
Wei-keng Liao, Alok N. Choudhary, Donald Weiner, P...
CASES
2006
ACM
15 years 8 months ago
A dynamic binary instrumentation engine for the ARM architecture
Dynamic binary instrumentation (DBI) is a powerful technique for analyzing the runtime behavior of software. While numerous DBI frameworks have been developed for general-purpose ...
Kim M. Hazelwood, Artur Klauser
120
Voted
ERSA
2006
133views Hardware» more  ERSA 2006»
15 years 3 months ago
An FPGA based Co-Design Architecture for MIMO Lattice Decoders
MIMO systems have attracted great attentions because of their huge capacity. The hardware implementation of MIMO decoder becomes a challenging task as the complexity of the MIMO sy...
Cao Liang, Jing Ma, Xin-Ming Huang
CASES
2005
ACM
15 years 3 months ago
Exploring the design space of LUT-based transparent accelerators
Instruction set customization accelerates the performance of applications by compressing the length of critical dependence paths and reducing the demands on processor resources. W...
Sami Yehia, Nathan Clark, Scott A. Mahlke, Kriszti...
PERCOM
2003
ACM
16 years 1 months ago
Portability, Extensibility and Robustness in iROS
The dynamism and heterogeneity in ubicomp environments on both short and long time scales implies that middleware platforms for these environments need to be designed ground up fo...
Shankar Ponnekanti, Brad Johanson, Emre Kiciman, A...