40 search results - page 4 / 8 » Loop Formulas for Description Logic Programs |
KBSE
2007
IEEE
15 years 4 months ago
2007
IEEE
A number of researchers have proposed the use of Boolean satisfiability solvers for verifying C programs. They encode correctness checks as Boolean formulas using finitization: ...
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AAAI
2006
14 years 12 months ago
2006
Recent research shows that SAT (propositional satisfiability) techniques can be employed to build efficient systems to compute answer sets for logic programs. ASSAT and CMODELS ar...
ILP
2007
Springer
15 years 4 months ago
2007
Springer
The management of business processes has recently received a lot of attention. One of the most interesting problems is the description of a process model in a language that allows ...
ICCAD
1996
IEEE
15 years 2 months ago
1996
IEEE
We propose a new method for generating BDDs from hardware algorithm descriptions written in a programming language. Our system can deal with control structures, such as conditiona...
FASE
2001
Springer
15 years 3 months ago
2001
Springer
Abstract. This paper describes a specialised logic for proving specifications in the Java Modeling Language (JML). JML is an interface specification language for Java. It allows ...