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» Loop Striping: Maximize Parallelism for Nested Loops
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POPL
1998
ACM
15 years 2 months ago
Maximal Static Expansion
Memory expansions are classical means to extract parallelism from imperative programs. However, for dynamic control programs with general memory accesses, such transformations eit...
Denis Barthou, Albert Cohen, Jean-Francois Collard
IEEEPACT
2006
IEEE
15 years 4 months ago
An empirical evaluation of chains of recurrences for array dependence testing
Code restructuring compilers rely heavily on program analysis techniques to automatically detect data dependences between program statements. Dependences between statement instanc...
Johnnie Birch, Robert A. van Engelen, Kyle A. Gall...
CGO
2004
IEEE
15 years 1 months ago
Custom Data Layout for Memory Parallelism
In this paper, we describe a generalized approach to deriving a custom data layout in multiple memory banks for array-based computations, to facilitate high-bandwidth parallel mem...
Byoungro So, Mary W. Hall, Heidi E. Ziegler
ICPP
1998
IEEE
15 years 2 months ago
A memory-layout oriented run-time technique for locality optimization
Exploiting locality at run-time is a complementary approach to a compiler approach for those applications with dynamic memory access patterns. This paper proposes a memory-layout ...
Yong Yan, Xiaodong Zhang, Zhao Zhang
HPCC
2009
Springer
15 years 2 months ago
On Instruction-Level Method for Reducing Cache Penalties in Embedded VLIW Processors
Usual cache optimisation techniques for high performance computing are difficult to apply in embedded VLIW applications. First, embedded applications are not always well structur...
Samir Ammenouche, Sid Ahmed Ali Touati, William Ja...