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HPCA
2009
IEEE
15 years 10 months ago
Design and evaluation of a hierarchical on-chip interconnect for next-generation CMPs
Performance and power consumption of an on-chip interconnect that forms the backbone of Chip Multiprocessors (CMPs), are directly influenced by the underlying network topology. Bo...
Reetuparna Das, Soumya Eachempati, Asit K. Mishra,...
SIGMOD
2007
ACM
167views Database» more  SIGMOD 2007»
15 years 9 months ago
Data currency in replicated DHTs
Distributed Hash Tables (DHTs) provide a scalable solution for data sharing in P2P systems. To ensure high data availability, DHTs typically rely on data replication, yet without ...
Reza Akbarinia, Esther Pacitti, Patrick Valduriez
82
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CCGRID
2005
IEEE
15 years 3 months ago
Mapping DAG-based applications to multiclusters with background workload
Before an application modelled as a Directed Acyclic Graph (DAG) is executed on a heterogeneous system, a DAG mapping policy is often enacted. After mapping, the tasks (in the DAG...
Ligang He, Stephen A. Jarvis, Daniel P. Spooner, D...
HPCA
2007
IEEE
15 years 9 months ago
MemTracker: Efficient and Programmable Support for Memory Access Monitoring and Debugging
Memory bugs are a broad class of bugs that is becoming increasingly common with increasing software complexity, and many of these bugs are also security vulnerabilities. Unfortuna...
Guru Venkataramani, Brandyn Roemer, Yan Solihin, M...
PDP
2010
IEEE
15 years 1 months ago
Energy-Efficient Hardware Prefetching for CMPs Using Heterogeneous Interconnects
In the last years high performance processor designs have evolved toward Chip-Multiprocessor (CMP) architectures that implement multiple processing cores on a single die. As the nu...
Antonio Flores, Juan L. Aragón, Manuel E. A...