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ICCCN
2007
IEEE
15 years 3 months ago
Serial Sum-Product Architecture for Low-Density Parity-Check Codes
—A serial sum-product architecture for low-density parity-check (LDPC) codes is presented. In the proposed architecture, a standard bit node processing unit computes the bit to c...
Ruwan N. S. Ratnayake, Erich F. Haratsch, Gu-Yeon ...
GLOBECOM
2009
IEEE
15 years 4 months ago
Sparse Decoding of Low Density Parity Check Codes Using Margin Propagation
—One of the key factors underlying the popularity of Low-density parity-check (LDPC) code is its iterative decoding algorithm that is amenable to efficient hardware implementati...
Ming Gu, Kiran Misra, Hayder Radha, Shantanu Chakr...
AC
2000
Springer
15 years 1 months ago
An Introduction to Low-Density Parity-Check Codes
Mohammad Amin Shokrollahi
ICC
2007
IEEE
124views Communications» more  ICC 2007»
15 years 3 months ago
Quantization Effects in Low-Density Parity-Check Decoders
−A class of combinatorial structures, called absorbing sets, strongly influences the performance of low-density paritycheck (LDPC) decoders. In particular, the quantization schem...
Zhengya Zhang, Lara Dolecek, Martin J. Wainwright,...
TCOM
2011
81views more  TCOM 2011»
14 years 4 months ago
Capacity Approaching Low-Rate LDGM Codes
Abstract——We study the ability of low-rate SeriallyConcatenated Low Density Generator Matrix (SCLDGM) codes to approach theoretical limits. Although two layer SCLDGM codes appro...
Francisco J. Vázquez-Araújo, Miguel ...