279 search results - page 55 / 56 » Low Overhead Parallel Schedules for Task Graphs |
IEEEPACT
2007
IEEE
14 years 17 days ago
2007
IEEE
As multi-core architectures flourish in the marketplace, multi-application workload scenarios (such as server consolidation) are growing rapidly. When running multiple application...
PDCAT
2009
Springer
14 years 24 days ago
2009
Springer
Abstract—In this paper, a tool named CheCUDA is designed to checkpoint CUDA applications that use GPUs as accelerators. As existing checkpoint/restart implementations do not supp...
AINA
2010
IEEE
13 years 10 months ago
2010
IEEE
One important challenge in wireless ad hoc networks is to achieve collision free communication. Many MAC layer protocols have been proposed by considering various communication mod...
HPCA
2009
IEEE
14 years 6 months ago
2009
IEEE
Heterogeneous multicores, such as Cell BE processors and GPGPUs, typically do not have caches for their accelerator cores because coherence traffic, cache misses, and latencies fr...
DAC
1998
ACM
13 years 10 months ago
1998
ACM
We present a technique for synthesizing power- as well as area-optimized circuits from hierarchical data flow graphs under throughput constraints. We allow for the use of complex...