1307 search results - page 15 / 262 » Low Power Hardware for a High Performance PDA |
90
Voted
ICCD
2006
IEEE
15 years 10 months ago
2006
IEEE
—X-filling is preferred for low-capture-power scan test generation, since it reduces IR-drop-induced yield loss without the need of any circuit modification. However, the effecti...
116
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HPCA
1996
IEEE
15 years 6 months ago
1996
IEEE
Exploiting instruction-level parallelism (ILP) is extremely important for achieving high performance in application specific instruction set processors (ASIPs) and embedded process...
110
Voted
ESAS
2004
Springer
15 years 7 months ago
2004
Springer
Abstract. Low power consumption, low gate count, and high throughput are standard design criteria for cryptographic coprocessors designated for resource constrained devices such as...
89
Voted
DAC
2008
ACM
16 years 2 months ago
2008
ACM
A low power passive equalizer using RL terminator is proposed and optimized in this work. The equalizer includes an inductor in series with the resistive terminator, which boosts ...
123
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DCC
2000
IEEE
15 years 6 months ago
2000
IEEE
We present a novel algorithm that assigns codes to instructions during instruction code compression in order to minimize bus-related bit-toggling and thus reducing power consumpti...