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DAC
2006
ACM
16 years 2 months ago
Subthreshold logical effort: a systematic framework for optimal subthreshold device sizing
Subthreshold circuit designs have been demonstrated to be a successful alternative when ultra-low power consumption is paramount. However, the characteristics of MOS transistors i...
John Keane, Hanyong Eom, Tae-Hyoung Kim, Sachin S....
VTC
2006
IEEE
15 years 8 months ago
An Iterative Detection Technique for DS-CDMA Signals with Strong Nonlinear Distortion Effects
Abstract - Whenever a DS-CDMA signal (Direct Sequence Code Division Multiple Access) is the sum of several components associated to different spreading codes (e.g., the DS-CDMA sig...
Rui Dinis, Paulo Silva
ISCA
2003
IEEE
101views Hardware» more  ISCA 2003»
15 years 7 months ago
Overcoming the Limitations of Conventional Vector Processors
Despite their superior performance for multimedia applications, vector processors have three limitations that hinder their widespread acceptance. First, the complexity and size of...
Christoforos E. Kozyrakis, David A. Patterson
DATE
2010
IEEE
180views Hardware» more  DATE 2010»
15 years 7 months ago
Integration, cooling and packaging issues for aerospace equipments
—Packaging becomes an important issue in aerospace equipments because of high integration and severe environmental constraints. In order to develop products which respond to the ...
Claude Sarno, C. Tantolin
AHS
2007
IEEE
251views Hardware» more  AHS 2007»
15 years 6 months ago
System Level Modelling of Reconfigurable FFT Architecture for System-on-Chip Design
In the system-on-chip (SoC) era, the growing number of functionalities included on a single chip requires the development of new design methodologies to keep the design complexity...
Ali Ahmadinia, Balal Ahmad, Tughrul Arslan