Sciweavers

1307 search results - page 189 / 262
» Low Power Hardware for a High Performance PDA
Sort
View
DSD
2009
IEEE
77views Hardware» more  DSD 2009»
15 years 8 months ago
Pulse Generation for On-chip Data Transmission
Abstract—Pulse-based data transmission has been demonstrated as a power-saving and high performance alternative to level-based signalling over global distances. Key to its correc...
Simon Hollis
SIGMETRICS
1992
ACM
145views Hardware» more  SIGMETRICS 1992»
15 years 6 months ago
Analysis of the Generalized Clock Buffer Replacement Scheme for Database Transaction Processing
The CLOCK algorithm is a popular buffer replacement algorithm becauseof its simplicity and its ability to approximate the performance of the Least Recently Used (LRU) replacement ...
Victor F. Nicola, Asit Dan, Daniel M. Dias
SIGMETRICS
2002
ACM
128views Hardware» more  SIGMETRICS 2002»
15 years 1 months ago
High-density model for server allocation and placement
It is well known that optimal server placement is NP-hard. We present an approximate model for the case when both clients and servers are dense, and propose a simple server alloca...
Craig W. Cameron, Steven H. Low, David X. Wei
ISCAS
2005
IEEE
147views Hardware» more  ISCAS 2005»
15 years 7 months ago
A two-chip, 4-MHz, microelectromechanical reference oscillator
— The paper describes a 4-MHz temperature compensated reference oscillator based on a capacitive silicon micro-mechanical resonator. The design of the resonator has been optimize...
Krishnakumar Sundaresan, Paul S. Ho, Siavash Pourk...
ASPDAC
2004
ACM
158views Hardware» more  ASPDAC 2004»
15 years 5 months ago
Decode filter cache for energy efficient instruction cache hierarchy in super scalar architectures
Abstract-- The power consumption of microprocessors has been increasing in step with the complexity of each progressive generation. In general purpose processors, this is primarily...
Kugan Vivekanandarajah, Thambipillai Srikanthan, S...