1307 search results - page 197 / 262 » Low Power Hardware for a High Performance PDA |
DATE
2010
IEEE
15 years 7 months ago
2010
IEEE
: Scaling down in very deep submicron (VDSM) technologies increases the delay, power consumption of on-chip interconnects, while the reliability and yield decrease. In high perform...
118
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ISQED
2007
IEEE
15 years 8 months ago
2007
IEEE
— In the past, dynamic voltage and frequency scaling (DVFS) has been widely used for power and energy optimization in embedded system design. As thermal issues become increasingl...
154
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VEE
2006
ACM
15 years 7 months ago
2006
ACM
Software Dynamic Translation (SDT) systems have been used for program instrumentation, dynamic optimization, security policy enforcement, intrusion detection, and many other uses....
EUROMICRO
1998
IEEE
15 years 6 months ago
1998
IEEE
As commodity microprocessors and networks reach performance levels comparable to those used in massively parallel processors, clusters of symmetric multiprocessors are starting to...
FPGA
2005
ACM
15 years 7 months ago
2005
ACM
Modern FPGA architectures provide ample routing resources so that designs can be routed successfully. The routing architecture is designed to handle versatile connection configur...