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ICCD
2007
IEEE
146views Hardware» more  ICCD 2007»
15 years 11 months ago
Exploring DRAM cache architectures for CMP server platforms
As dual-core and quad-core processors arrive in the marketplace, the momentum behind CMP architectures continues to grow strong. As more and more cores/threads are placed on-die, ...
Li Zhao, Ravi R. Iyer, Ramesh Illikkal, Donald New...
ISSS
2002
IEEE
194views Hardware» more  ISSS 2002»
15 years 6 months ago
Managing Dynamic Concurrent Tasks in Embedded Real-Time Multimedia Systems
This paper addresses the problem of mapping an application, which is highly dynamic in the future, onto a heterogeneous multiprocessor platform in an energy efficient way. A two-p...
Rudy Lauwereins, Chun Wong, Paul Marchal, Johan Vo...
ISCAS
1999
IEEE
129views Hardware» more  ISCAS 1999»
15 years 6 months ago
A tunable triode-MOSFET transconductor and its application to gm-C filters
A linear, tunable CMOS transconductance stage is introduced. Drain voltage of the input transistor operating in triode region is settled by a regulation loop and a first-order lin...
Jader A. De Lima, C. Dualibe
ASPDAC
2008
ACM
94views Hardware» more  ASPDAC 2008»
15 years 3 months ago
Robust on-chip bus architecture synthesis for MPSoCs under random tasks arrival
A major trend in a modern system-on-chip design is a growing system complexity, which results in a sharp increase of communication traffic on the on-chip communication bus architec...
Sujan Pandey, Rolf Drechsler
JMM2
2007
118views more  JMM2 2007»
15 years 1 months ago
FPGA-based Real-time Optical Flow Algorithm Design and Implementation
—Optical flow algorithms are difficult to apply to robotic vision applications in practice because of their extremely high computational and frame rate requirements. In most case...
Zhaoyi Wei, Dah-Jye Lee, Brent E. Nelson