Sciweavers

1307 search results - page 207 / 262
» Low Power Hardware for a High Performance PDA
Sort
View
HPCA
2011
IEEE
14 years 5 months ago
Essential roles of exploiting internal parallelism of flash memory based solid state drives in high-speed data processing
Flash memory based solid state drives (SSDs) have shown a great potential to change storage infrastructure fundamentally through their high performance and low power. Most recent ...
Feng Chen, Rubao Lee, Xiaodong Zhang
111
Voted
ISCA
2007
IEEE
110views Hardware» more  ISCA 2007»
15 years 8 months ago
Late-binding: enabling unordered load-store queues
Conventional load/store queues (LSQs) are an impediment to both power-efficient execution in superscalar processors and scaling to large-window designs. In this paper, we propose...
Simha Sethumadhavan, Franziska Roesner, Joel S. Em...
ASPDAC
2008
ACM
104views Hardware» more  ASPDAC 2008»
15 years 3 months ago
Variability-driven module selection with joint design time optimization and post-silicon tuning
Abstract-- Increasing delay and power variation are significant challenges to the designers as technology scales to the deep sub-micron (DSM) regime. Traditional module selection t...
Feng Wang 0004, Xiaoxia Wu, Yuan Xie
162
Voted
ISCA
2011
IEEE
269views Hardware» more  ISCA 2011»
14 years 5 months ago
Crafting a usable microkernel, processor, and I/O system with strict and provable information flow security
High assurance systems used in avionics, medical implants, and cryptographic devices often rely on a small trusted base of hardware and software to manage the rest of the system. ...
Mohit Tiwari, Jason Oberg, Xun Li 0001, Jonathan V...
137
Voted
IEEEPACT
2007
IEEE
15 years 8 months ago
AA-Sort: A New Parallel Sorting Algorithm for Multi-Core SIMD Processors
Many sorting algorithms have been studied in the past, but there are only a few algorithms that can effectively exploit both SIMD instructions and threadlevel parallelism. In this...
Hiroshi Inoue, Takao Moriyama, Hideaki Komatsu, To...