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» Low Power Hardware for a High Performance PDA
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111
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DAC
2006
ACM
16 years 2 months ago
Low-power bus encoding using an adaptive hybrid algorithm
In this paper, we propose an adaptive low-power bus encoding algorithm based on weighted code mapping (WCM) and the delayed bus technique. The WCM algorithm transforms an original...
Avnish R. Brahmbhatt, Jingyi Zhang, Qing Wu, Qinru...
MSS
2007
IEEE
82views Hardware» more  MSS 2007»
15 years 8 months ago
Tornado Codes for MAID Archival Storage
This paper examines the application of Tornado Codes, a class of low density parity check (LDPC) erasure codes, to archival storage systems based on massive arrays of idle disks (...
Matthew Woitaszek, Henry M. Tufo
IPSN
2007
Springer
15 years 8 months ago
Active sensing platform for wireless structural health monitoring
This paper presents SHiMmer, a wireless platform for sensing and actuation that combines localized processing with energy harvesting to provide long-lived structural health monito...
D. Musiani, K. Lin, Tajana Simunic Rosing
78
Voted
ISCAS
2006
IEEE
93views Hardware» more  ISCAS 2006»
15 years 8 months ago
A low-power clock frequency multiplier
A low-power output feedback controlled frequency synthesizer. Our proposed circuit can be used for low-power multiplier is proposed for Delay Locked Loop (DLL) based application an...
Md. Ibrahim Faisal, Magdy A. Bayoumi, Peiyi Zhao
DAMON
2006
Springer
15 years 5 months ago
Processing-in-memory technology for knowledge discovery algorithms
The goal of this work is to gain insight into whether processingin-memory (PIM) technology can be used to accelerate the performance of link discovery algorithms, which represent ...
Jafar Adibi, Tim Barrett, Spundun Bhatt, Hans Chal...