155 search results - page 17 / 31 » Low Power Techniques for Digital GaAs VLSI |
VLSID
2008
IEEE
16 years 5 days ago
2008
IEEE
Real-time embedded systems increasingly rely on dynamic power management to balance between power and performance goals. In this paper, we present a technique for continuous frequ...
TVLSI
2002
14 years 11 months ago
2002
Gate diffusion input (GDI)--a new technique of low-power digital combinatorial circuit design--is described. This technique allows reducing power consumption, propagation delay, an...
116
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VLSID
2009
IEEE
16 years 12 days ago
2009
IEEE
In this paper, we present a dynamic power management technique for optimizing the use of virtual channels in network on chips. The technique which is called dynamic virtual channe...
112
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ICASSP
2011
IEEE
14 years 3 months ago
2011
IEEE
In this paper, we consider power spectral density estimation of bandlimited, wide-sense stationary signals from sub-Nyquist sampled data. This problem has recently received attent...
DFT
2007
IEEE
15 years 6 months ago
2007
IEEE
The network-on-chip (NoC) paradigm is seen as a way of facilitating the integration of a large number of computational and storage blocks on a chip to meet several performance and...