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» Low Power Techniques for Digital GaAs VLSI
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DATE
2006
IEEE
171views Hardware» more  DATE 2006»
15 years 8 months ago
Dynamic bit-width adaptation in DCT: image quality versus computation energy trade-off
We present a dynamic bit-width adaptation scheme in DCT applications for efficient trade-off between image quality and computation energy. Based on sensitivity differences of 64 ...
Jongsun Park, Jung Hwan Choi, Kaushik Roy
ICIP
2010
IEEE
14 years 11 months ago
Joint color decrosstalk and demosaicking for CFA cameras
In interest of low cost, low power consumption, and compact size, most digital cameras adopt a design of single sensor array coupled with a color filter array. This design inevita...
Xiaolin Wu, Xiangjun Zhang
118
Voted
CODES
2007
IEEE
15 years 5 months ago
Energy efficient co-scheduling in dynamically reconfigurable systems
Energy consumption is a major issue in dynamically reconfigurable systems because of the high power requirements during repeated configurations. Hardware designs employ low power ...
Pao-Ann Hsiung, Pin-Hsien Lu, Chih-Wen Liu
SBCCI
2006
ACM
200views VLSI» more  SBCCI 2006»
15 years 7 months ago
A differential switched-capacitor amplifier with programmable gain and output offset voltage
The design of a low-power differential switched-capacitor amplifier for processing a fully-differential input signal coming from a pressure sensor interface is reported. The circu...
Fabio Lacerda, Stefano Pietri, Alfredo Olmos
ICES
2005
Springer
177views Hardware» more  ICES 2005»
15 years 7 months ago
Evolving Hardware by Dynamically Reconfiguring Xilinx FPGAs
Evolvable Hardware arises as a promising solution for automatic digital synthesis of digital and analog circuits. During the last decade, a special interest has been focused on evo...
Andres Upegui, Eduardo Sanchez