82 search results - page 4 / 17 » Low power logic synthesis for XOR based circuits |
DAC
2004
ACM
15 years 5 months ago
2004
ACM
In order to improve the testabilities and power consumption, a new state assignment technique based on m-block partition is introduced in this paper. The length and number of feed...
CF
2008
ACM
15 years 1 months ago
2008
ACM
Using a new exact synthesizer that automatically induces minimal universal boolean function libraries, we introduce two indicators for comparing their expressiveness: the first ba...
IOLTS
2003
IEEE
15 years 5 months ago
2003
IEEE
A methodology for the synthesis of partially selfchecking multilevel logic circuits with low-cost paritybased concurrent error detection (CED) is described. A subset of the inputs...
ASAP
2009
IEEE
15 years 3 months ago
2009
IEEE
An implementation of a radix-4 approximate squaring circuit is described employing a new operand dual recoding technique. Approximate squaring circuits have numerous applications ...
ICCAD
2002
IEEE
15 years 4 months ago
2002
IEEE
The ultimate goal of logic synthesis is to explore implementation flexibility toward meeting design targets, such as area, power, and delay. Traditionally, such flexibility is exp...