14 search results - page 3 / 3 » Low power microarchitecture with instruction reuse |
VEE
2006
ACM
15 years 3 months ago
2006
ACM
During recent years, microprocessor energy consumption has been surging and efforts to reduce power and energy have received a lot of attention. At the same time, virtual executio...
78
Voted
DAC
1998
ACM
15 years 10 months ago
1998
ACM
The growing class of portable systems, such as personal computing and communication devices, has resulted in a new set of system design requirements, mainly characterized by domin...
81
Voted
HPCA
1996
IEEE
15 years 1 months ago
1996
IEEE
Exploiting instruction-level parallelism (ILP) is extremely important for achieving high performance in application specific instruction set processors (ASIPs) and embedded process...
HPCA
2012
IEEE
13 years 5 months ago
2012
IEEE
Conventional out-of-order processors that use a unified physical register file allocate and reclaim registers explicitly using a free list that operates as a circular queue. We ...