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» Low power techniques for Motion Estimation hardware
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ISQED
2007
IEEE
197views Hardware» more  ISQED 2007»
15 years 6 months ago
A Simple Flip-Flop Circuit for Typical-Case Designs for DFM
The deep submicron (DSM) semiconductor technologies will make the worst-case design impossible, since they can not provide design margins that it requires. Research directions sho...
Toshinori Sato, Yuji Kunitake
FPL
2009
Springer
149views Hardware» more  FPL 2009»
15 years 4 months ago
Reconfigurable fault tolerance: A framework for environmentally adaptive fault mitigation in space
Commercial SRAM-based FPGAs have the potential to provide aerospace applications with the necessary performance to meet next-generation mission requirements. However, the suscepti...
Adam Jacobs, Alan D. George, Grzegorz Cieslewski
ISCA
2002
IEEE
96views Hardware» more  ISCA 2002»
15 years 4 months ago
Dynamic Fine-Grain Leakage Reduction Using Leakage-Biased Bitlines
Leakage power is dominated by critical paths, and hence dynamic deactivation of fast transistors can yield large savings. We introduce metrics for comparing fine-grain dynamic de...
Seongmoo Heo, Kenneth C. Barr, Mark Hampton, Krste...
ASPDAC
1998
ACM
72views Hardware» more  ASPDAC 1998»
15 years 3 months ago
Space- and Time-Efficient BDD Construction via Working Set Control
Binary decision diagrams (BDDs) have been shown to be a powerful tool in formal verification. Efficient BDD construction techniques become more important as the complexity of proto...
Bwolen Yang, Yirng-An Chen, Randal E. Bryant, Davi...
ISCA
2006
IEEE
137views Hardware» more  ISCA 2006»
15 years 5 months ago
Interconnect-Aware Coherence Protocols for Chip Multiprocessors
Improvements in semiconductor technology have made it possible to include multiple processor cores on a single die. Chip Multi-Processors (CMP) are an attractive choice for future...
Liqun Cheng, Naveen Muralimanohar, Karthik Ramani,...