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» Low threshold CMOS circuits with low standby current
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ISVLSI
2005
IEEE
129views VLSI» more  ISVLSI 2005»
15 years 5 months ago
Reduction of Direct Tunneling Power Dissipation during Behavioral Synthesis of Nanometer CMOS Circuits
— Direct tunneling current is the major component of static power dissipation of a CMOS circuit for technology below 65nm, where the gate dielectric (SiO2) is very low. We intuit...
Saraju P. Mohanty, Ramakrishna Velagapudi, Valmiki...
GLVLSI
2009
IEEE
167views VLSI» more  GLVLSI 2009»
15 years 6 months ago
Dual-threshold pass-transistor logic design
This paper introduces pass-transistor logic design with dualthreshold voltages. A set of single-rail, fully restored, passtransistor gates are presented. Logic transistors are imp...
Lara D. Oliver, Krishnendu Chakrabarty, Hisham Z. ...
ASPDAC
2009
ACM
159views Hardware» more  ASPDAC 2009»
15 years 4 months ago
Congestion-aware power grid optimization for 3D circuits using MIM and CMOS decoupling capacitors
— In three-dimensional (3D) chips, the amount of supply current per package pin is significantly more than in two-dimensional (2D) designs. Therefore, the power supply noise pro...
Pingqiang Zhou, Karthikk Sridharan, Sachin S. Sapa...
VLSID
2006
IEEE
129views VLSI» more  VLSID 2006»
16 years 1 days ago
Modeling and Reduction of Gate Leakage during Behavioral Synthesis of NanoCMOS Circuits
For a nanoCMOS of sub-65nm technology, where the gate oxide (SiO2) thickness is very low, the gate leakage is one of the major components of power dissipation. In this paper, we pr...
Saraju P. Mohanty, Elias Kougianos
ISCAS
2005
IEEE
185views Hardware» more  ISCAS 2005»
15 years 5 months ago
2 GHz 8-bit CMOS ROM-less direct digital frequency synthesizer
—This paper presents a 2GHz 8-bit CMOS ROM-less direct digital frequency synthesizer (DDFS). Nonlinear current steering digital to analog converter (DAC) has been utilized to con...
Xuefeng Yu, Foster F. Dai, Yin Shi, Ronghua Zhu