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» Low threshold CMOS circuits with low standby current
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ISLPED
2003
ACM
149views Hardware» more  ISLPED 2003»
15 years 4 months ago
Elements of low power design for integrated systems
The increasing prominence of portable systems and the need to limit power consumption and hence, heat dissipation in very high density VLSI chips have led to rapid and innovative ...
Sung-Mo Kang
GLVLSI
2007
IEEE
134views VLSI» more  GLVLSI 2007»
15 years 6 months ago
Sleep transistor distribution in row-based MTCMOS designs
- The Multi-Threshold CMOS (MTCMOS) technology has become a popular technique for standby power reduction. This technology utilizes high-Vth sleep transistors to reduce subthreshol...
Chanseok Hwang, Peng Rong, Massoud Pedram
ISCAS
2007
IEEE
113views Hardware» more  ISCAS 2007»
15 years 5 months ago
A Low Power 4-bit Interleaved Burst Sampling ADC for Sub-GHz Impulse UWB Radio
Abstract—This paper presents a low power 4-bit ADC for subGHz Ultra Wideband (UWB) receivers. The power efficiency is achieved by taking advantage of the low duty cycle feature o...
Xiaodong Zhang, Magdy Bayoumi
ISCAS
2005
IEEE
177views Hardware» more  ISCAS 2005»
15 years 5 months ago
Subthreshold-leakage suppressed switched capacitor circuit based on super cut-off CMOS (SCCMOS)
A subthreshold-leakage suppressed switched capacitor (SC) circuit based on super cut-off CMOS (SCCMOS) scheme is introduced. This scheme realizes low-voltage SC circuits using low...
K. Ishida, K. Kanda, A. Tamtrakarn, H. Kawaguchi, ...
DAC
2005
ACM
15 years 1 months ago
Total power reduction in CMOS circuits via gate sizing and multiple threshold voltages
Minimizing power consumption is one of the most important objectives in IC design. Resizing gates and assigning different Vt’s are common ways to meet power and timing budgets. ...
Feng Gao, John P. Hayes