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ISCAS
2007
IEEE
113views Hardware» more  ISCAS 2007»
15 years 6 months ago
Design Considerations for Future RF Circuits
TheRFdesignparadigm will changesignificantly asCMOS technology scales and integration levels rise to accommodate multi-band, multi-mode transceivers and baseband processors. This...
Behzad Razavi
DATE
2008
IEEE
79views Hardware» more  DATE 2008»
15 years 6 months ago
A Programmable and Low-EMI Integrated Half-Bridge Driver in BCD Technology
This paper presents the design and the laboratory results of an integrated half-bridge driver for power electronic systems in a 0.35 µm Bipolar CMOS DMOS (BCD) technology. The pr...
Francesco D'Ascoli, Luca Bacciarelli, Massimiliano...
ISLPED
2009
ACM
168views Hardware» more  ISLPED 2009»
15 years 6 months ago
Low power circuit design based on heterojunction tunneling transistors (HETTs)
The theoretical lower limit of subthreshold swing in MOSFETs (60 mV/decade) significantly restricts low voltage operation since it results in a low ON to OFF current ratio at low ...
Daeyeon Kim, Yoonmyung Lee, Jin Cai, Isaac Lauer, ...
DAC
2002
ACM
16 years 18 days ago
DRG-cache: a data retention gated-ground cache for low power
In this paper we propose a novel integrated circuit and architectural level technique to reduce leakage power consumption in high performance cache memories using single Vt (trans...
Amit Agarwal, Hai Li, Kaushik Roy
GLVLSI
2003
IEEE
185views VLSI» more  GLVLSI 2003»
15 years 5 months ago
Noise tolerant low voltage XOR-XNOR for fast arithmetic
With scaling down to deep submicron and nanometer technologies, noise immunity is becoming a metric of the same importance as power, speed, and area. Smaller feature sizes, low vo...
Mohamed A. Elgamel, Sumeer Goel, Magdy A. Bayoumi