With aggressive technology scaling, SRAM design has been seriously challenged by the difficulties in analyzing rare failure events. In this paper we propose to create statistical ...
Jian Wang, Soner Yaldiz, Xin Li, Lawrence T. Pileg...
Post-silicon validation has recently drawn designers' attention due to its increasing impacts on the VLSI design cycle and cost. One key feature of the post-silicon validatio...
This paper introduces an accurate and efficient electrical analysis of logic gates modeled as Multiple Voltage Threshold Models (MVTM) loaded by the associated interconnect. MVTMs...
Peter Feldmann, Soroush Abbaspour, Debjit Sinha, G...
Achieving high performance under a peak temperature limit is a first-order concern for VLSI designers. This paper presents a new model of a thermally-managed system, where a stoch...
The complexity and physical distribution of modern active-safety automotive applications requires the use of distributed architectures. These architectures consist of multiple ele...
Abhijit Davare, Qi Zhu, Marco Di Natale, Claudio P...