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ICCAD
1997
IEEE
86views Hardware» more  ICCAD 1997»
15 years 9 months ago
Micro-preemption synthesis: an enabling mechanism for multi-task VLSI systems
- Task preemption is a critical enabling mechanism in multi-task VLSI systems. On preemption, data in the register les must be preserved in order for the task to be resumed. This e...
Kyosun Kim, Ramesh Karri, Miodrag Potkonjak
136
Voted
ICDAR
1997
IEEE
15 years 9 months ago
Memory efficient skeletonization of utility maps
An algorithm is presented that allows to perform skeletonization of large maps with much lower memory requirements than with the straightforward approach. The maps are divided int...
Albert M. Vossepoel, Klamer Schutte, Carl F. P. De...
ICNP
1997
IEEE
15 years 9 months ago
On-line Dynamic Bandwidth Allocation
Network multimedia applications require certain performance guarantees that can be provided through proper resource allocation. Allocation techniques are needed to provide these g...
Errin W. Fulp, Douglas S. Reeves
122
Voted
TABLEAUX
1998
Springer
15 years 9 months ago
The FaCT System
The FaCT (Fact and Concept Training) System provides a general platform for delivering practice in the form of discrete flashcard-like drills. The system optimizes practice schedu...
Ian Horrocks
187
Voted
TACAS
1998
Springer
131views Algorithms» more  TACAS 1998»
15 years 9 months ago
Detecting Races in Relay Ladder Logic Programs
Relay Ladder Logic (RLL) [4] is a programming language widely used for complex embedded control applications such as manufacturing and amusement park rides. The cost of bugs in RLL...
Alexander Aiken, Manuel Fähndrich, Zhendong S...