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EVOW
2001
Springer
15 years 2 months ago
ARPIA: A High-Level Evolutionary Test Signal Generator
The integrated circuits design flow is rapidly moving towards higher description levels. However, test-related activities are lacking behind this trend, mainly since effective faul...
Fulvio Corno, Gianluca Cumani, Matteo Sonza Reorda...
97
Voted
APSEC
2004
IEEE
15 years 1 months ago
JAOUT: Automated Generation of Aspect-Oriented Unit Test
Unit testing is a methodology for testing small parts of an application independently of whatever application uses them. It is time consuming and tedious to write unit tests, and ...
Guoqing Xu, Zongyuan Yang, Haitao Huang, Qian Chen...
83
Voted
SEW
2007
IEEE
15 years 3 months ago
Testing Patterns
: After over a decade of use, design patterns continue to find new areas of application. In previous work, we presented a contract formalism for specifying patterns precisely, and...
Neelam Soundarajan, Jason O. Hallstrom, Adem Delib...
80
Voted
SIGSOFT
2007
ACM
15 years 10 months ago
CTG: a connectivity trace generator for testing the performance of opportunistic mobile systems
The testing of the performance of opportunistic communication protocols and applications is usually done through simulation as i) deployments are expensive and should be left to t...
Roberta Calegari, Mirco Musolesi, Franco Raimondi,...
DFT
2002
IEEE
127views VLSI» more  DFT 2002»
15 years 2 months ago
A New Functional Fault Model for FPGA Application-Oriented Testing
1 The objective of this paper is to propose a new fault model suitable for test pattern generation for an FPGA configured to implement a given application. The paper demonstrates t...
Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo ...