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» Low-power circuits using dynamic threshold devices
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IOLTS
2005
IEEE
141views Hardware» more  IOLTS 2005»
15 years 3 months ago
A Novel On-Chip Delay Measurement Hardware for Efficient Speed-Binning
With the aggressive scaling of the CMOS technology parametric variation of the transistor threshold voltage causes significant spread in the circuit delay as well as leakage spect...
Arijit Raychowdhury, Swaroop Ghosh, Kaushik Roy
74
Voted
ISCAS
2007
IEEE
79views Hardware» more  ISCAS 2007»
15 years 4 months ago
Impact of strain on the design of low-power high-speed circuits
- In this article, we explore the impact of strain on circuit performance when strained silicon (s-Si) devices are used for designing low-power high-speed circuits. Emphasis has be...
H. Ramakrishnan, K. Maharatna, S. Chattopadhyay, A...
59
Voted
INFOCOM
2009
IEEE
15 years 4 months ago
A Threshold Based MAC Protocol for Cooperative MIMO Transmissions
— This paper develops a distributed, threshold based MAC protocol for cooperative Multi Input Multi Output (MIMO) transmissions in distributed wireless systems. The protocol uses...
Haiming Yang, Hsin-Yi Shen, Biplab Sikdar, Shivkum...
ICCAD
2003
IEEE
149views Hardware» more  ICCAD 2003»
15 years 6 months ago
Algorithm for Achieving Minimum Energy Consumption in CMOS Circuits Using Multiple Supply and Threshold Voltages at the Module L
This paper proposes an optimum methodology for assigning supply and threshold voltages to modules in a CMOS circuit such that the overall energy consumption is minimized for a giv...
Yuvraj Singh Dhillon, Abdulkadir Utku Diril, Abhij...
ISCAS
2006
IEEE
144views Hardware» more  ISCAS 2006»
15 years 3 months ago
A VLSI spike-driven dynamic synapse which learns only when necessary
— We describe an analog VLSI circuit implementing spike-driven synaptic plasticity, embedded in a network of integrate-and-fire neurons. This biologically inspired synapse is hi...
S. Mitra, Stefano Fusi, Giacomo Indiveri