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» Low-power data forwarding for VLIW embedded architectures
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VLSID
2007
IEEE
130views VLSI» more  VLSID 2007»
15 years 10 months ago
Memory Architecture Exploration for Power-Efficient 2D-Discrete Wavelet Transform
The Discrete Wavelet Transform (DWT) forms the core of the JPEG2000 image compression algorithm. Since the JPEG2000 compression application is heavily data-intensive, the overall ...
Rahul Jain, Preeti Ranjan Panda
LCTRTS
2001
Springer
15 years 2 months ago
ILP-based Instruction Scheduling for IA-64
The IA-64 architecture has been designed as a synthesis of VLIW and superscalar design principles. It incorporates typical functionality known from embedded processors as multiply...
Daniel Kästner, Sebastian Winkel
DAC
2006
ACM
15 years 10 months ago
Multiprocessor system-on-chip data reuse analysis for exploring customized memory hierarchies
The increasing use of Multiprocessor Systems-on-Chip (MPSoCs) for high performance demands of embedded applications results in high power dissipation. The memory subsystem is a la...
Ilya Issenin, Erik Brockmeyer, Bart Durinck, Nikil...
ICCD
2005
IEEE
165views Hardware» more  ICCD 2005»
15 years 6 months ago
Applying Resource Sharing Algorithms to ADL-driven Automatic ASIP Implementation
Presently, Architecture Description Languages (ADLs) are widely used to raise the abstraction level of the design space exploration of Application Specific Instruction-set Proces...
Ernst Martin Witte, Anupam Chattopadhyay, Oliver S...
ISCAS
2005
IEEE
167views Hardware» more  ISCAS 2005»
15 years 3 months ago
A 33.2M vertices/sec programmable geometry engine for multimedia embedded systems
—This paper proposes a programmable geometry engine (GE) reducing the expensive internal buffers and register files of the conventional programmable GEs and sharing datapaths of ...
Chang-Hyo Yu, Donghyun Kim, Lee-Sup Kim