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» Lower Bounds in Distributed Computing
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SPAA
2010
ACM
15 years 9 months ago
Lightweight, robust adaptivity for software transactional memory
When a program uses Software Transactional Memory (STM) to synchronize accesses to shared memory, the performance often depends on which STM implementation is used. Implementation...
Michael F. Spear
HPCC
2009
Springer
15 years 9 months ago
A Quantitative Study of Memory System Interference in Chip Multiprocessor Architectures
—The potential for destructive interference between running processes is increased as Chip Multiprocessors (CMPs) share more on-chip resources. We believe that understanding the ...
Magnus Jahre, Marius Grannæs, Lasse Natvig
ICPADS
2000
IEEE
15 years 9 months ago
A Practical Nonblocking Queue Algorithm Using Compare-and-Swap
Many nonblocking algorithms have been proposed for shared queues. Previous studies indicate that link-based algorithms perform best. However, these algorithms have a memory manage...
Chien-Hua Shann, Ting-Lu Huang, Cheng Chen
ICPP
2000
IEEE
15 years 9 months ago
Multilayer VLSI Layout for Interconnection Networks
Current VLSI technology allows more than two wiring layers and the number is expected to rise in future. In this paper, we show that, by designing VLSI layouts directly for an L-l...
Chi-Hsiang Yeh, Emmanouel A. Varvarigos, Behrooz P...
IEEEPACT
2000
IEEE
15 years 9 months ago
Neighborhood Prefetching on Multiprocessors Using Instruction History
A multiprocessor prefetch scheme is described in which a miss is followed by a prefetch of a group of lines, a neighborhood, surrounding the demand-fetched line. The neighborhood ...
David M. Koppelman