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» Lower bounds on power dissipation for DSP algorithms
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DAGSTUHL
2007
14 years 11 months ago
Diagonal Circuit Identity Testing and Lower Bounds
In this paper we give the first deterministic polynomial time algorithm for testing whether a diagonal depth-3 circuit C(x1, . . . , xn) (i.e. C is a sum of powers of linear funct...
Nitin Saxena
COMSWARE
2007
IEEE
15 years 3 months ago
Sequence Design for Symbol-Asynchronous CDMA with Power or Rate Constraints
— Sequence design and resource allocation for a symbol-asynchronous chip-synchronous code division multiple access (CDMA) system is considered in this paper. A simple lower bound...
Jyothiram Kasturi, Rajesh Sundaresan
SOSP
2001
ACM
15 years 6 months ago
Real-Time Dynamic Voltage Scaling for Low-Power Embedded Operating Systems
In recent years, there has been a rapid and wide spread of nontraditional computing platforms, especially mobile and portable computing devices. As applications become increasingl...
Padmanabhan Pillai, Kang G. Shin
101
Voted
ISLPED
1997
ACM
130views Hardware» more  ISLPED 1997»
15 years 29 days ago
K2: an estimator for peak sustainable power of VLSI circuits
New measures of peak power in the context of sequential circuits are proposed. This paper presents an automatic procedure to obtain very good lower bounds on these measures as wel...
Michael S. Hsiao, Elizabeth M. Rudnick, Janak H. P...
TC
2010
14 years 7 months ago
Redundant-Digit Floating-Point Addition Scheme Based on a Stored Rounding Value
—Due to the widespread use and inherent complexity of floating-point addition, much effort has been devoted to its speedup via algorithmic and circuit techniques. We propose a ne...
Ghassem Jaberipur, Behrooz Parhami, Saeid Gorgin