129 search results - page 6 / 26 » Lower bounds on power dissipation for DSP algorithms |
CORR
2010
Springer
14 years 9 months ago
2010
Springer
A polynomial identity testing algorithm must determine whether an input polynomial (given for instance by an arithmetic circuit) is identically equal to 0. In this paper, we show ...
CSE
2009
IEEE
15 years 21 days ago
2009
IEEE
— Low energy consumption is a critical issue in embedded systems design. As the technology feature sizes of SoC (Systems on Chip) become smaller and smaller, the percentage of le...
TVLSI
2002
14 years 9 months ago
2002
: Clock networks account for a significant fraction of the power dissipation of a chip and are critical to performance. This paper presents theory and algorithms for building a low...
ICCAD
2003
IEEE
15 years 6 months ago
2003
IEEE
As Field-Programmable Gate Array (FPGA) power consumption continues to increase, lower power FPGA circuitry, architectures, and Computer-Aided Design (CAD) tools need to be develo...
ESA
2009
Springer
15 years 4 months ago
2009
Springer
Abstract. The throughput capacity of arbitrary wireless networks under the physical Signal to Interference Plus Noise Ratio (SINR) model has received a greater deal of attention in...