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RSP
2003
IEEE
147views Control Systems» more  RSP 2003»
15 years 2 months ago
Cache Configuration Exploration on Prototyping Platforms
We describe cache architecture, intended for prototype-oriented IC platforms, that automatically finds the best cache configuration for a particular application. The cache itself ...
Chuanjun Zhang, Frank Vahid
67
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VLSID
2008
IEEE
120views VLSI» more  VLSID 2008»
15 years 10 months ago
Continuous Frequency Adjustment Technique Based on Dynamic Workload Prediction
Real-time embedded systems increasingly rely on dynamic power management to balance between power and performance goals. In this paper, we present a technique for continuous frequ...
Hwisung Jung, Massoud Pedram
GLVLSI
2007
IEEE
211views VLSI» more  GLVLSI 2007»
15 years 4 months ago
Multi-processor operating system emulation framework with thermal feedback for systems-on-chip
Multi-Processor System-On-Chip (MPSoC) can provide the performance levels required by high-end embedded applications. However, they do so at the price of an increasing power densi...
Salvatore Carta, Andrea Acquaviva, Pablo Garcia De...
IESS
2007
Springer
120views Hardware» more  IESS 2007»
15 years 3 months ago
Error Containment in the Time-Triggered System-On-a-Chip Architecture
Abstract: The time-triggered System-on-a-Chip (SoC) architecture provides a generic multicore system platform for a family of composable and dependable giga-scale SoCs. It supports...
Roman Obermaisser, Hermann Kopetz, Christian El Sa...
FPL
2007
Springer
105views Hardware» more  FPL 2007»
15 years 3 months ago
Time Predictable CPU and DMA Shared Memory Access
In this paper, we propose a first step towards a time predictable computer architecture for single-chip multiprocessing (CMP). CMP is the actual trend in server and desktop syste...
Christof Pitter, Martin Schoeberl