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» MEMS Design And Verification
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FMCAD
2008
Springer
14 years 11 months ago
BackSpace: Formal Analysis for Post-Silicon Debug
Post-silicon debug is the problem of determining what's wrong when the fabricated chip of a new design behaves incorrectly. This problem now consumes over half of the overall ...
Flavio M. de Paula, Marcel Gort, Alan J. Hu, Steve...
BCSHCI
2007
14 years 11 months ago
Use study on a home video editing system
To help consumers dealing with their growing amount of home video, we have developed the Edit While Watching (EWW) system. It is designed to automatically create an edited version...
Hans Weda, Marco Campanella
MAM
2006
101views more  MAM 2006»
14 years 9 months ago
EPICURE: A partitioning and co-design framework for reconfigurable computing
This paper presents a new design methodology able to bridge the gap between an abstract specification and a heterogeneous recone architecture. The EPICURE contribution is the resu...
Jean-Philippe Diguet, Guy Gogniat, Jean Luc Philip...
TIFS
2008
145views more  TIFS 2008»
14 years 9 months ago
Physical-Layer Authentication
Authentication is the process where claims of identity are verified. Most mechanisms of authentication (e.g., digital signatures and certificates) exist above the physical layer, t...
Paul L. Yu, John S. Baras, Brian M. Sadler
VLSID
2010
IEEE
155views VLSI» more  VLSID 2010»
14 years 7 months ago
Synchronized Generation of Directed Tests Using Satisfiability Solving
Directed test generation is important for the functional verification of complex system-on-chip designs. SAT based bounded model checking is promising for counterexample generatio...
Xiaoke Qin, Mingsong Chen, Prabhat Mishra