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    DATE
    2008
    IEEE
    84views Hardware» more  DATE 2008»
    On the Verification of High-Order Constraint Compliance in IC Design
    15 years 4 months ago
    On the Verification of High-Order Constraint Compliance in IC Design
    Download  www.date-conference.com
    Jan B. Freuer, Göran Jerke, Joachim Gerlach, ...
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    GLOBECOM
    2008
    IEEE
    94views Communications» more  GLOBECOM 2008»
    On the Design of Overlay Networks for IP Links Fault Verification
    15 years 4 months ago
    On the Design of Overlay Networks for IP Links Fault Verification
    Download  vulcan.ee.iastate.edu
    Mohammad Fraiwan, G. Manimaran
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    ACSD
    2007
    IEEE
    90views Hardware» more  ACSD 2007»
    Using CTL formulae as component abstraction in a design and verification flow
    15 years 4 months ago
    Using CTL formulae as component abstraction in a design and verification flow
    Download  www.lsv.ens-cachan.fr
    Cécile Braunstein, Emmanuelle Encrenaz
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    DATE
    2007
    IEEE
    108views Hardware» more  DATE 2007»
    A symbolic methodology for the verification of analog and mixed signal designs
    15 years 4 months ago
    A symbolic methodology for the verification of analog and mixed signal designs
    Download  www.date-conference.com
    Ghiath Al Sammane, Mohamed H. Zaki, Sofiène...
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    FMICS
    2007
    Springer
    125views Formal Methods» more  FMICS 2007»
    Synchronous Design and Verification of Critical Embedded Systems Using SCADE and Esterel
    15 years 3 months ago
    Synchronous Design and Verification of Critical Embedded Systems Using SCADE and Esterel
    Download  www.cse.iitb.ac.in
    Gérard Berry
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