1342 search results - page 51 / 269 » MEMS Design And Verification |
ENTCS
2008
14 years 9 months ago
2008
We describe the design and the present state of the verification tool Augur 2 which is currently being developed. It is based on Augur 1, a tool which can analyze graph transforma...
ENTCS
2006
14 years 9 months ago
2006
Effective formal verification tools require that robust implementations of automatic procedures for first-order logic and satisfiability modulo theories be integrated into express...
DATE
2006
IEEE
15 years 3 months ago
2006
IEEE
—In this paper we describe a methodology to measure exactly the quality of fault-tolerant designs by combining faultinjection in high level design (HLD) descriptions with a forma...
ICCAD
1996
IEEE
15 years 1 months ago
1996
IEEE
Functional simulation is the most widely used method for design verification. At various levels of abstraction, e.g., behavioral, register-transfer level and gate level, the design...
ASYNC
2007
IEEE
15 years 1 months ago
2007
IEEE
Few formal verification techniques are currently available for asynchronous designs. In this paper, we describe a new approach for the formal verification of asynchronous architec...