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» MEMS Design And Verification
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DAC
2005
ACM
15 years 10 months ago
A new canonical form for fast boolean matching in logic synthesis and verification
? An efficient and compact canonical form is proposed for the Boolean matching problem under permutation and complementation of variables. In addition an efficient algorithm for co...
Afshin Abdollahi, Massoud Pedram
ATVA
2009
Springer
141views Hardware» more  ATVA 2009»
15 years 1 months ago
Formal Verification for High-Assurance Behavioral Synthesis
We present a framework for certifying hardware designs generated through behavioral synthesis, by using formal verification to certify the associated synthesis transformations. We ...
Sandip Ray, Kecheng Hao, Yan Chen, Fei Xie, Jin Ya...
BCSHCI
2007
14 years 11 months ago
Design in evaluation: reflections on designing for children's technology
This paper reflects on the design value that emerges from evaluation methods used in the field of child computer interaction. The work is based around an evaluation study of a tan...
Emanuela Mazzone, Diana Yifan Xu, Janet C. Read
ASPDAC
2007
ACM
136views Hardware» more  ASPDAC 2007»
15 years 1 months ago
Design tool solutions for mixed-signal/RF circuit design in CMOS nanometer technologies
The scaling of CMOS technology into the nanometer era enables the fabrication of highly integrated systems, which increasingly contain analog and/or RF parts. However, scaling into...
Georges G. E. Gielen