This paper suggests tools that provide significant improvements in the design and verification of FPGAbased digital circuits. These tools include reusable specifications of hardwa...
Valery Sklyarov, Iouliia Skliarova, Pedro Almeida,...
Automated finite-state verification techniques have matured considerably in the past several years, but state-space explosion remains an obstacle to their use. Theoretical lower b...
Yung-Pin Cheng, Michal Young, Che-Ling Huang, Chia...
This paper describes the use of integer equations for high level modeling digital circuits for application of formal verification properties at this level. Most formal verificatio...
Parameterized heuristics abound in computer aided design and verification, and manual tuning of the respective parameters is difficult and time-consuming. Very recent results from ...
Frank Hutter, Domagoj Babic, Holger H. Hoos, Alan ...
We have extended the ACL2 theorem prover to automatically prove properties of VHDL circuits with IBM's Internal SixthSense verification system. We have used this extension to...