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» MEMS Design And Verification
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CCS
2008
ACM
14 years 12 months ago
CMV: automatic verification of complete mediation for java virtual machines
Runtime monitoring systems play an important role in system security, and verification efforts that ensure that these systems satisfy certain desirable security properties are gro...
A. Prasad Sistla, V. N. Venkatakrishnan, Michelle ...
BELL
2000
107views more  BELL 2000»
14 years 9 months ago
Automating software feature verification
A significant part of the call processing software for Lucent's new PathStar access server [FSW98] was checked with automated formal verification techniques. The verification...
Gerard J. Holzmann, Margaret H. Smith
DATE
1999
IEEE
134views Hardware» more  DATE 1999»
15 years 2 months ago
Verifying Imprecisely Working Arithmetic Circuits
If real number calculations are implemented as circuits, only a limited preciseness can be obtained. Hence, formal verification can not be used to prove the equivalence between th...
Michaela Huhn, Klaus Schneider, Thomas Kropf, Geor...
SBMF
2010
Springer
205views Formal Methods» more  SBMF 2010»
14 years 4 months ago
A High-Level Language for Modeling Algorithms and Their Properties
Designers of concurrent and distributed algorithms usually express them using pseudo-code. In contrast, most verification techniques are based on more mathematically-oriented forma...
Sabina Akhtar, Stephan Merz, Martin Quinson
EURODAC
1995
IEEE
156views VHDL» more  EURODAC 1995»
15 years 1 months ago
VHDL quality: synthesizability, complexity and efficiency evaluation
With VHDL models increasing their size, it becomes more important to assure the quality of these descriptions in order to improve simulation performances, to make project maintain...
M. Mastretti