1342 search results - page 79 / 269 » MEMS Design And Verification |
CADE
2002
Springer
15 years 10 months ago
2002
Springer
This paper reports on the formal proof of correctness of a compiler from a substantial subset of Java source language to Java bytecode in the proof environment Isabelle. This work ...
DAC
1990
ACM
15 years 1 months ago
1990
ACM
In this paper, we provide an overview of a system designed for verifying the consistency of timing specifications for digital circuits. The utility of the system comes from the ne...
SIGSOFT
2007
ACM
15 years 10 months ago
2007
ACM
Finding flaws in security protocol implementations is hard. Finding flaws in the implementations of sensor network security protocols is even harder because they are designed to p...
ATAL
2008
Springer
14 years 12 months ago
2008
Springer
OperettA is a graphical tool that supports the design, verification and simulation of OperA models. It ensures consistency between different design parts, provides a formal specif...
FDL
2007
IEEE
15 years 4 months ago
2007
IEEE
—This paper presents Anahita Processor Description Language (APDL) for generation of retargetable processor design tool sets. The emphasis is on the applicability of the generate...