1342 search results - page 89 / 269 » MEMS Design And Verification |
RTAS
1998
IEEE
15 years 2 months ago
1998
IEEE
In this paper we report the work carried out at VERIMAG 1 within the framework of an research cooperation with CNET 2 . The goal of this work was twofold: to formally specify the ...
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SEC
2003
14 years 11 months ago
2003
For the emerging ambient environments, in which interconnected intelligent devices will surround us to increase the comfort of our lives, fault tolerance and security are of paramo...
GLVLSI
2002
IEEE
15 years 2 months ago
2002
IEEE
As an efficient representation of Extended Finite State Machines, Multiway Decision Graphs (MDG) are suitable for automatic hardware verification of Register Transfer Level (RTL) ...
ASE
2008
14 years 10 months ago
2008
Model checkers were originally developed to support the formal verification of high-level design models of distributed system designs. Over the years, they have become unmatched in...
DAC
2006
ACM
15 years 11 months ago
2006
ACM
A simple protocol for latency-insensitive design is presented. The main features of the protocol are the efficient implementation of elastic communication channels and the automat...